Index: binutils/gas/testsuite/gas/avr32/avr32.exp
===================================================================
--- binutils/gas/testsuite/gas/avr32/avr32.exp	(revision 4943)
+++ binutils/gas/testsuite/gas/avr32/avr32.exp	(revision 4944)
@@ -7,6 +7,7 @@
     run_dump_test "dwarf2"
     run_dump_test "pic_reloc"
     run_dump_test "fpinsn"
+    run_dump_test "pico"
     run_dump_test "lda_pic"
     run_dump_test "lda_pic_linkrelax"
     run_dump_test "lda_nopic"
Index: binutils/gas/testsuite/gas/avr32/pico.d
===================================================================
--- binutils/gas/testsuite/gas/avr32/pico.d	(revision 0)
+++ binutils/gas/testsuite/gas/avr32/pico.d	(revision 4944)
@@ -0,0 +1,149 @@
+#as:
+#objdump: -dr
+#name: pico
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+[0-9a-f]* <picosvmac>:
+ *[0-9a-f]*:	e1 a7 22 22 	cop cp1,cr2,cr2,cr2,0xe
+ *[0-9a-f]*:	e1 a6 20 00 	cop cp1,cr0,cr0,cr0,0xc
+ *[0-9a-f]*:	e1 a6 30 21 	cop cp1,cr0,cr2,cr1,0xd
+ *[0-9a-f]*:	e1 a7 21 02 	cop cp1,cr1,cr0,cr2,0xe
+
+[0-9a-f]* <picosvmul>:
+ *[0-9a-f]*:	e1 a5 22 22 	cop cp1,cr2,cr2,cr2,0xa
+ *[0-9a-f]*:	e1 a4 20 00 	cop cp1,cr0,cr0,cr0,0x8
+ *[0-9a-f]*:	e1 a4 30 21 	cop cp1,cr0,cr2,cr1,0x9
+ *[0-9a-f]*:	e1 a5 21 02 	cop cp1,cr1,cr0,cr2,0xa
+
+[0-9a-f]* <picovmac>:
+ *[0-9a-f]*:	e1 a3 22 22 	cop cp1,cr2,cr2,cr2,0x6
+ *[0-9a-f]*:	e1 a2 20 00 	cop cp1,cr0,cr0,cr0,0x4
+ *[0-9a-f]*:	e1 a2 30 21 	cop cp1,cr0,cr2,cr1,0x5
+ *[0-9a-f]*:	e1 a3 21 02 	cop cp1,cr1,cr0,cr2,0x6
+
+[0-9a-f]* <picovmul>:
+ *[0-9a-f]*:	e1 a1 22 22 	cop cp1,cr2,cr2,cr2,0x2
+ *[0-9a-f]*:	e1 a0 20 00 	cop cp1,cr0,cr0,cr0,0x0
+ *[0-9a-f]*:	e1 a0 30 21 	cop cp1,cr0,cr2,cr1,0x1
+ *[0-9a-f]*:	e1 a1 21 02 	cop cp1,cr1,cr0,cr2,0x2
+
+[0-9a-f]* <picold_d>:
+ *[0-9a-f]*:	e9 af 3e ff 	ldc\.d cp1,cr14,pc\[0x3fc\]
+ *[0-9a-f]*:	e9 a0 30 ff 	ldc\.d cp1,cr0,r0\[0x3fc\]
+ *[0-9a-f]*:	e9 a0 30 00 	ldc\.d cp1,cr0,r0\[0x0\]
+ *[0-9a-f]*:	ef a8 26 50 	ldc\.d cp1,cr6,--r8
+ *[0-9a-f]*:	ef a7 28 50 	ldc\.d cp1,cr8,--r7
+ *[0-9a-f]*:	ef aa 32 65 	ldc\.d cp1,cr2,r10\[r5<<0x2\]
+ *[0-9a-f]*:	ef a3 3c 46 	ldc\.d cp1,cr12,r3\[r6\]
+
+[0-9a-f]* <picold_w>:
+ *[0-9a-f]*:	e9 af 2f ff 	ldc\.w cp1,cr15,pc\[0x3fc\]
+ *[0-9a-f]*:	e9 a0 20 ff 	ldc\.w cp1,cr0,r0\[0x3fc\]
+ *[0-9a-f]*:	e9 a0 20 00 	ldc\.w cp1,cr0,r0\[0x0\]
+ *[0-9a-f]*:	ef a8 27 40 	ldc\.w cp1,cr7,--r8
+ *[0-9a-f]*:	ef a7 28 40 	ldc\.w cp1,cr8,--r7
+ *[0-9a-f]*:	ef aa 31 25 	ldc\.w cp1,cr1,r10\[r5<<0x2\]
+ *[0-9a-f]*:	ef a3 3d 06 	ldc\.w cp1,cr13,r3\[r6\]
+
+[0-9a-f]* <picoldm_d>:
+ *[0-9a-f]*:	ed af 24 ff 	ldcm\.d cp1,pc,cr0-cr15
+ *[0-9a-f]*:	ed a0 24 01 	ldcm\.d cp1,r0,cr0-cr1
+ *[0-9a-f]*:	ed a7 24 80 	ldcm\.d cp1,r7,cr14-cr15
+ *[0-9a-f]*:	ed a8 24 7f 	ldcm\.d cp1,r8,cr0-cr13
+
+[0-9a-f]* <picoldm_d_pu>:
+ *[0-9a-f]*:	ed af 34 ff 	ldcm\.d cp1,pc\+\+,cr0-cr15
+ *[0-9a-f]*:	ed a0 34 01 	ldcm\.d cp1,r0\+\+,cr0-cr1
+ *[0-9a-f]*:	ed a7 34 80 	ldcm\.d cp1,r7\+\+,cr14-cr15
+ *[0-9a-f]*:	ed a8 34 7f 	ldcm\.d cp1,r8\+\+,cr0-cr13
+
+[0-9a-f]* <picoldm_w>:
+ *[0-9a-f]*:	ed af 20 ff 	ldcm\.w cp1,pc,cr0-cr7
+ *[0-9a-f]*:	ed a0 20 01 	ldcm\.w cp1,r0,cr0
+ *[0-9a-f]*:	ed a7 20 80 	ldcm\.w cp1,r7,cr7
+ *[0-9a-f]*:	ed a8 20 7f 	ldcm\.w cp1,r8,cr0-cr6
+ *[0-9a-f]*:	ed af 21 ff 	ldcm\.w cp1,pc,cr8-cr15
+ *[0-9a-f]*:	ed a0 21 01 	ldcm\.w cp1,r0,cr8
+ *[0-9a-f]*:	ed a7 21 80 	ldcm\.w cp1,r7,cr15
+ *[0-9a-f]*:	ed a8 21 7f 	ldcm\.w cp1,r8,cr8-cr14
+
+[0-9a-f]* <picoldm_w_pu>:
+ *[0-9a-f]*:	ed af 30 ff 	ldcm\.w cp1,pc\+\+,cr0-cr7
+ *[0-9a-f]*:	ed a0 30 01 	ldcm\.w cp1,r0\+\+,cr0
+ *[0-9a-f]*:	ed a7 30 80 	ldcm\.w cp1,r7\+\+,cr7
+ *[0-9a-f]*:	ed a8 30 7f 	ldcm\.w cp1,r8\+\+,cr0-cr6
+ *[0-9a-f]*:	ed af 31 ff 	ldcm\.w cp1,pc\+\+,cr8-cr15
+ *[0-9a-f]*:	ed a0 31 01 	ldcm\.w cp1,r0\+\+,cr8
+ *[0-9a-f]*:	ed a7 31 80 	ldcm\.w cp1,r7\+\+,cr15
+ *[0-9a-f]*:	ed a8 31 7f 	ldcm\.w cp1,r8\+\+,cr8-cr14
+
+[0-9a-f]* <picomv_d>:
+ *[0-9a-f]*:	ef ae 2e 30 	mvrc\.d cp1,cr14,lr
+ *[0-9a-f]*:	ef a0 20 30 	mvrc\.d cp1,cr0,r0
+ *[0-9a-f]*:	ef a8 26 30 	mvrc\.d cp1,cr6,r8
+ *[0-9a-f]*:	ef a6 28 30 	mvrc\.d cp1,cr8,r6
+ *[0-9a-f]*:	ef ae 2e 10 	mvcr\.d cp1,lr,cr14
+ *[0-9a-f]*:	ef a0 20 10 	mvcr\.d cp1,r0,cr0
+ *[0-9a-f]*:	ef a8 26 10 	mvcr\.d cp1,r8,cr6
+ *[0-9a-f]*:	ef a6 28 10 	mvcr\.d cp1,r6,cr8
+
+[0-9a-f]* <picomv_w>:
+ *[0-9a-f]*:	ef af 2f 20 	mvrc\.w cp1,cr15,pc
+ *[0-9a-f]*:	ef a0 20 20 	mvrc\.w cp1,cr0,r0
+ *[0-9a-f]*:	ef a8 27 20 	mvrc\.w cp1,cr7,r8
+ *[0-9a-f]*:	ef a7 28 20 	mvrc\.w cp1,cr8,r7
+ *[0-9a-f]*:	ef af 2f 00 	mvcr\.w cp1,pc,cr15
+ *[0-9a-f]*:	ef a0 20 00 	mvcr\.w cp1,r0,cr0
+ *[0-9a-f]*:	ef a8 27 00 	mvcr\.w cp1,r8,cr7
+ *[0-9a-f]*:	ef a7 28 00 	mvcr\.w cp1,r7,cr8
+
+[0-9a-f]* <picost_d>:
+ *[0-9a-f]*:	eb af 3e ff 	stc\.d cp1,pc\[0x3fc\],cr14
+ *[0-9a-f]*:	eb a0 30 00 	stc\.d cp1,r0\[0x0\],cr0
+ *[0-9a-f]*:	ef a8 26 70 	stc\.d cp1,r8\+\+,cr6
+ *[0-9a-f]*:	ef a7 28 70 	stc\.d cp1,r7\+\+,cr8
+ *[0-9a-f]*:	ef aa 32 e5 	stc\.d cp1,r10\[r5<<0x2\],cr2
+ *[0-9a-f]*:	ef a3 3c c6 	stc\.d cp1,r3\[r6\],cr12
+
+[0-9a-f]* <picost_w>:
+ *[0-9a-f]*:	eb af 2f ff 	stc\.w cp1,pc\[0x3fc\],cr15
+ *[0-9a-f]*:	eb a0 20 00 	stc\.w cp1,r0\[0x0\],cr0
+ *[0-9a-f]*:	ef a8 27 60 	stc\.w cp1,r8\+\+,cr7
+ *[0-9a-f]*:	ef a7 28 60 	stc\.w cp1,r7\+\+,cr8
+ *[0-9a-f]*:	ef aa 31 a5 	stc\.w cp1,r10\[r5<<0x2\],cr1
+ *[0-9a-f]*:	ef a3 3d 86 	stc\.w cp1,r3\[r6\],cr13
+
+[0-9a-f]* <picostm_d>:
+ *[0-9a-f]*:	ed af 25 ff 	stcm\.d cp1,pc,cr0-cr15
+ *[0-9a-f]*:	ed a0 25 01 	stcm\.d cp1,r0,cr0-cr1
+ *[0-9a-f]*:	ed a7 25 80 	stcm\.d cp1,r7,cr14-cr15
+ *[0-9a-f]*:	ed a8 25 7f 	stcm\.d cp1,r8,cr0-cr13
+
+[0-9a-f]* <picostm_d_pu>:
+ *[0-9a-f]*:	ed af 35 ff 	stcm\.d cp1,--pc,cr0-cr15
+ *[0-9a-f]*:	ed a0 35 01 	stcm\.d cp1,--r0,cr0-cr1
+ *[0-9a-f]*:	ed a7 35 80 	stcm\.d cp1,--r7,cr14-cr15
+ *[0-9a-f]*:	ed a8 35 7f 	stcm\.d cp1,--r8,cr0-cr13
+
+[0-9a-f]* <picostm_w>:
+ *[0-9a-f]*:	ed af 22 ff 	stcm\.w cp1,pc,cr0-cr7
+ *[0-9a-f]*:	ed a0 22 01 	stcm\.w cp1,r0,cr0
+ *[0-9a-f]*:	ed a7 22 80 	stcm\.w cp1,r7,cr7
+ *[0-9a-f]*:	ed a8 22 7f 	stcm\.w cp1,r8,cr0-cr6
+ *[0-9a-f]*:	ed af 23 ff 	stcm\.w cp1,pc,cr8-cr15
+ *[0-9a-f]*:	ed a0 23 01 	stcm\.w cp1,r0,cr8
+ *[0-9a-f]*:	ed a7 23 80 	stcm\.w cp1,r7,cr15
+ *[0-9a-f]*:	ed a8 23 7f 	stcm\.w cp1,r8,cr8-cr14
+
+[0-9a-f]* <picostm_w_pu>:
+ *[0-9a-f]*:	ed af 32 ff 	stcm\.w cp1,--pc,cr0-cr7
+ *[0-9a-f]*:	ed a0 32 01 	stcm\.w cp1,--r0,cr0
+ *[0-9a-f]*:	ed a7 32 80 	stcm\.w cp1,--r7,cr7
+ *[0-9a-f]*:	ed a8 32 7f 	stcm\.w cp1,--r8,cr0-cr6
+ *[0-9a-f]*:	ed af 33 ff 	stcm\.w cp1,--pc,cr8-cr15
+ *[0-9a-f]*:	ed a0 33 01 	stcm\.w cp1,--r0,cr8
+ *[0-9a-f]*:	ed a7 33 80 	stcm\.w cp1,--r7,cr15
+ *[0-9a-f]*:	ed a8 33 7f 	stcm\.w cp1,--r8,cr8-cr14
Index: binutils/gas/testsuite/gas/avr32/pico.s
===================================================================
--- binutils/gas/testsuite/gas/avr32/pico.s	(revision 0)
+++ binutils/gas/testsuite/gas/avr32/pico.s	(revision 4944)
@@ -0,0 +1,144 @@
+
+	.text
+	.global	picosvmac
+picosvmac:
+	picosvmac	outpix0, inpix0, inpix0, inpix0
+	picosvmac	outpix2, inpix2, inpix2, inpix2
+	picosvmac	outpix1, inpix2, inpix0, inpix1
+	picosvmac	outpix0, inpix1, inpix2, inpix0
+	.global picosvmul
+picosvmul:
+	picosvmul	outpix0, inpix0, inpix0, inpix0
+	picosvmul	outpix2, inpix2, inpix2, inpix2
+	picosvmul	outpix1, inpix2, inpix0, inpix1
+	picosvmul	outpix0, inpix1, inpix2, inpix0
+	.global picovmac
+picovmac:
+	picovmac	outpix0, inpix0, inpix0, inpix0
+	picovmac	outpix2, inpix2, inpix2, inpix2
+	picovmac	outpix1, inpix2, inpix0, inpix1
+	picovmac	outpix0, inpix1, inpix2, inpix0
+	.global picovmul
+picovmul:
+	picovmul	outpix0, inpix0, inpix0, inpix0
+	picovmul	outpix2, inpix2, inpix2, inpix2
+	picovmul	outpix1, inpix2, inpix0, inpix1
+	picovmul	outpix0, inpix1, inpix2, inpix0
+	.global	picold_d
+picold_d:
+	picold.d	vmu2_out, pc[1020]
+	picold.d	inpix2, r0[1020]
+	picold.d	inpix2, r0[0]
+	picold.d	coeff0_a, --r8
+	picold.d	coeff1_a, --r7
+	picold.d	inpix0, r10[r5 << 2]
+	picold.d	vmu0_out, r3[r6 << 0]
+	.global	picold_w
+picold_w:	
+	picold.w	config, pc[1020]
+	picold.w	inpix2, r0[1020]
+	picold.w	inpix2, r0[0]
+	picold.w	coeff0_b, --r8
+	picold.w	coeff1_a, --r7
+	picold.w	inpix1, r10[r5 << 2]
+	picold.w	vmu1_out, r3[r6 << 0]
+	.global	picoldm_d
+picoldm_d:
+	picoldm.d	pc, inpix2-config
+	picoldm.d	r0, inpix2, inpix1
+	picoldm.d	r7, vmu2_out, config
+	picoldm.d	r8, inpix2-vmu1_out
+	.global	picoldm_d_pu
+picoldm_d_pu:
+	picoldm.d	pc++, inpix2, inpix1, inpix0, outpix2, outpix1, outpix0, coeff0_a, coeff0_b, coeff1_a, coeff1_b, coeff2_a, coeff2_b, vmu0_out, vmu1_out, vmu2_out, config
+	picoldm.d	r0++, inpix2, inpix1
+	picoldm.d	r7++, vmu2_out, config
+	picoldm.d	r8++, inpix2, inpix1, inpix0, outpix2, outpix1, outpix0, coeff0_a, coeff0_b, coeff1_a, coeff1_b, coeff2_a, coeff2_b, vmu0_out, vmu1_out
+	.global	picoldm_w
+picoldm_w:
+	picoldm.w	pc, inpix2-coeff0_b
+	picoldm.w	r0, inpix2
+	picoldm.w	r7, coeff0_b
+	picoldm.w	r8, inpix2-coeff0_a
+	picoldm.w	pc, coeff1_a-config
+	picoldm.w	r0, coeff1_a
+	picoldm.w	r7, config
+	picoldm.w	r8, coeff1_a-vmu2_out
+	.global	picoldm_w_pu
+picoldm_w_pu:
+	picoldm.w	pc++, inpix2-coeff0_b
+	picoldm.w	r0++, inpix2
+	picoldm.w	r7++, coeff0_b
+	picoldm.w	r8++, inpix2-coeff0_a
+	picoldm.w	pc++, coeff1_a-config
+	picoldm.w	r0++, coeff1_a
+	picoldm.w	r7++, config
+	picoldm.w	r8++, coeff1_a-vmu2_out
+	.global	picomv_d
+picomv_d:
+	picomv.d	vmu2_out, lr
+	picomv.d	inpix2, r0
+	picomv.d	coeff0_a, r8
+	picomv.d	coeff1_a, r6
+	picomv.d	pc, vmu2_out
+	picomv.d	r0, inpix2
+	picomv.d	r8, coeff0_a
+	picomv.d	r6, coeff1_a
+	.global	picomv_w
+picomv_w:
+	picomv.w	config, pc
+	picomv.w	inpix2, r0
+	picomv.w	coeff0_b, r8
+	picomv.w	coeff1_a, r7
+	picomv.w	pc, config
+	picomv.w	r0, inpix2
+	picomv.w	r8, coeff0_b
+	picomv.w	r7, coeff1_a
+	.global	picost_d
+picost_d:
+	picost.d	pc[1020], vmu2_out
+	picost.d	r0[0], inpix2
+	picost.d	r8++, coeff0_a
+	picost.d	r7++, coeff1_a
+	picost.d	r10[r5 << 2], inpix0
+	picost.d	r3[r6 << 0], vmu0_out
+	.global	picost_w
+picost_w:	
+	picost.w	pc[1020], config
+	picost.w	r0[0], inpix2
+	picost.w	r8++, coeff0_b
+	picost.w	r7++, coeff1_a
+	picost.w	r10[r5 << 2], inpix1
+	picost.w	r3[r6 << 0], vmu1_out
+	.global	picostm_d
+picostm_d:
+	picostm.d	pc, inpix2-config
+	picostm.d	r0, inpix2, inpix1
+	picostm.d	r7, vmu2_out, config
+	picostm.d	r8, inpix2-vmu1_out
+	.global	picostm_d_pu
+picostm_d_pu:
+	picostm.d	--pc, inpix2, inpix1, inpix0, outpix2, outpix1, outpix0, coeff0_a, coeff0_b, coeff1_a, coeff1_b, coeff2_a, coeff2_b, vmu0_out, vmu1_out, vmu2_out, config
+	picostm.d	--r0, inpix2, inpix1
+	picostm.d	--r7, vmu2_out, config
+	picostm.d	--r8, inpix2, inpix1, inpix0, outpix2, outpix1, outpix0, coeff0_a, coeff0_b, coeff1_a, coeff1_b, coeff2_a, coeff2_b, vmu0_out, vmu1_out
+	.global	picostm_w
+picostm_w:
+	picostm.w	pc, inpix2-coeff0_b
+	picostm.w	r0, inpix2
+	picostm.w	r7, coeff0_b
+	picostm.w	r8, inpix2-coeff0_a
+	picostm.w	pc, coeff1_a-config
+	picostm.w	r0, coeff1_a
+	picostm.w	r7, config
+	picostm.w	r8, coeff1_a-vmu2_out
+	.global	picostm_w_pu
+picostm_w_pu:
+	picostm.w	--pc, inpix2-coeff0_b
+	picostm.w	--r0, inpix2
+	picostm.w	--r7, coeff0_b
+	picostm.w	--r8, inpix2-coeff0_a
+	picostm.w	--pc, coeff1_a-config
+	picostm.w	--r0, coeff1_a
+	picostm.w	--r7, config
+	picostm.w	--r8, coeff1_a-vmu2_out
Index: binutils/gas/config/tc-avr32.c
===================================================================
--- binutils/gas/config/tc-avr32.c	(revision 4943)
+++ binutils/gas/config/tc-avr32.c	(revision 4944)
@@ -146,13 +146,13 @@
 
 static struct cpu_type_s cpu_types[] =
 {
-  {"ap7000", AVR32_V1 | AVR32_SIMD | AVR32_DSP},
-  {"all-insn", AVR32_V1 | AVR32_SIMD | AVR32_DSP | AVR32_RMW | AVR32_FP},
+  {"ap7000", AVR32_V1 | AVR32_SIMD | AVR32_DSP | AVR32_PICO},
+  {"all-insn", AVR32_V1 | AVR32_SIMD | AVR32_DSP | AVR32_RMW | AVR32_FP | AVR32_PICO},
   {NULL, 0}
 };
 
 /* Current CPU type.  */
-static struct cpu_type_s default_cpu = {"all-insn", AVR32_V1 | AVR32_SIMD | AVR32_DSP | AVR32_RMW | AVR32_FP};
+static struct cpu_type_s default_cpu = {"all-insn", AVR32_V1 | AVR32_SIMD | AVR32_DSP | AVR32_RMW | AVR32_FP | AVR32_PICO };
 static struct cpu_type_s *avr32_cpu = &default_cpu;
 
 /* Display nicely formatted list of known CPU names.  */
@@ -759,6 +759,49 @@
   return 1;
 }
 
+static int
+match_picoreg(char *str)
+{
+  int regid;
+
+  regid = avr32_parse_picoreg(str);
+  if (regid < 0)
+    return 0;
+  return 1;
+}
+
+#define match_pico_reglist_w	match_anything
+#define match_pico_reglist_d	match_anything
+
+static int
+match_pico_out0(char *str)
+{
+  if (strncasecmp(str, "outpix", 6) != 0)
+    return 0;
+  if (str[6] != '0' || str[7])
+    return 0;
+  return 1;
+}
+
+static int
+match_pico_out1(char *str)
+{
+  if (strncasecmp(str, "outpix", 6) != 0)
+    return 0;
+  if (str[6] != '1' || str[7])
+    return 0;
+  return 1;
+}
+static int
+match_pico_out2(char *str)
+{
+  if (strncasecmp(str, "outpix", 6) != 0)
+    return 0;
+  if (str[6] != '2' || str[7])
+    return 0;
+  return 1;
+}
+
 static void parse_nothing(const struct avr32_operand *op ATTRIBUTE_UNUSED,
 			  char *str ATTRIBUTE_UNUSED,
 			  int opindex ATTRIBUTE_UNUSED)
@@ -1708,6 +1751,94 @@
   current_insn.field_value[slot].align_order = op->align_order;
 }
 
+static void
+parse_picoreg(const struct avr32_operand *op,
+	      char *str, int opindex ATTRIBUTE_UNUSED)
+{
+  unsigned long regid;
+  int slot;
+
+  regid = avr32_parse_picoreg(str);
+  if (regid & ((1 << op->align_order) - 1))
+    as_bad(_("invalid double-word PiCo register `%s'"), str);
+
+  slot = current_insn.next_slot++;
+  current_insn.field_value[slot].value = regid;
+  current_insn.field_value[slot].align_order = op->align_order;
+}
+
+static void
+parse_pico_reglist_w(const struct avr32_operand *op,
+		     char *str, int opindex ATTRIBUTE_UNUSED)
+{
+  unsigned long regmask;
+  int slot, h_bit = 0;
+  char *tail;
+
+  regmask = avr32_parse_pico_reglist(str, &tail);
+  if (*tail)
+    as_bad(_("junk at end of line: `%s'"), tail);
+
+  if (regmask & 0x00ffUL)
+    {
+      if (regmask & 0xff00UL)
+	as_bad(_("register list `%s' doesn't fit"), str);
+      regmask &= 0x00ffUL;
+    }
+  else if (regmask & 0xff00UL)
+    {
+      regmask >>= 8;
+      h_bit = 1;
+    }
+  else
+    as_warn(_("register list is empty"));
+
+  slot = current_insn.next_slot++;
+  current_insn.field_value[slot].value = regmask;
+  slot = current_insn.next_slot++;
+  current_insn.field_value[slot].value = h_bit;
+}
+
+static void
+parse_pico_reglist_d(const struct avr32_operand *op,
+		     char *str, int opindex ATTRIBUTE_UNUSED)
+{
+  unsigned long regmask, regmask_d = 0;
+  int slot, i;
+  char *tail;
+
+  regmask = avr32_parse_pico_reglist(str, &tail);
+  if (*tail)
+    as_bad(_("junk at end of line: `%s'"), tail);
+
+  for (i = 0; i < 8; i++)
+    {
+      if (regmask & 1)
+	{
+	  if (!(regmask & 2))
+	    {
+	      as_bad(_("register list `%s' doesn't fit"), str);
+	      break;
+	    }
+	  regmask_d |= 1 << i;
+	}
+      else if (regmask & 2)
+	{
+	  as_bad(_("register list `%s' doesn't fit"), str);
+	  break;
+	}
+
+      regmask >>= 2;
+    }
+
+  slot = current_insn.next_slot++;
+  current_insn.field_value[slot].value = regmask_d;
+}
+
+#define parse_pico_out0		parse_nothing
+#define parse_pico_out1		parse_nothing
+#define parse_pico_out2		parse_nothing
+
 #define OP(name, sgn, pcrel, align, func) \
   { AVR32_OPERAND_##name, sgn, pcrel, align, match_##func, parse_##func }
 
@@ -1753,6 +1884,13 @@
   OP(COH, 0, 0, 0, coh),
   OP(FPREG_S, 0, 0, 0, fpreg),
   OP(FPREG_D, 0, 0, 1, fpreg),
+  OP(PICO_REG_W, 0, 0, 0, picoreg),
+  OP(PICO_REG_D, 0, 0, 1, picoreg),
+  OP(PICO_REGLIST_W, 0, 0, 0, pico_reglist_w),
+  OP(PICO_REGLIST_D, 0, 0, 0, pico_reglist_d),
+  OP(PICO_OUT0, 0, 0, 0, pico_out0),
+  OP(PICO_OUT1, 0, 0, 0, pico_out1),
+  OP(PICO_OUT2, 0, 0, 0, pico_out2),
 };
 
 symbolS *
Index: binutils/opcodes/avr32-asm.c
===================================================================
--- binutils/opcodes/avr32-asm.c	(revision 4943)
+++ binutils/opcodes/avr32-asm.c	(revision 4944)
@@ -65,6 +65,18 @@
   };
 #define AVR32_NR_FPREGS (sizeof(fr_table)/sizeof(fr_table[0]))
 
+/* PiCo Registers.  */
+static const struct reg_entry pico_table[] =
+  {
+    { "inpix2",    0 }, { "inpix1",    1 }, { "inpix0",    2 },
+    { "outpix2",   3 }, { "outpix1",   4 }, { "outpix0",   5 },
+    { "coeff0_a",  6 }, { "coeff0_b",  7 }, { "coeff1_a",  8 },
+    { "coeff1_b",  9 }, { "coeff2_a", 10 }, { "coeff2_b", 11 },
+    { "vmu0_out", 12 }, { "vmu1_out", 13 }, { "vmu2_out", 14 },
+    { "config",   15 },
+  };
+#define AVR32_NR_PICOREGS (sizeof(pico_table)/sizeof(pico_table[0]))
+
 int
 avr32_parse_intreg(const char *str)
 {
@@ -106,6 +118,19 @@
   return -1;
 }
 
+int avr32_parse_picoreg(const char *str)
+{
+  unsigned int i;
+
+  for (i = 0; i < AVR32_NR_PICOREGS; i++)
+    {
+      if (strcasecmp(pico_table[i].name, str) == 0)
+	return pico_table[i].number;
+    }
+
+  return -1;
+}
+
 static unsigned long
 parse_reglist(char *str, char **endptr, int (*parse_reg)(const char *))
 {
@@ -169,6 +194,12 @@
   return parse_reglist(str, endptr, avr32_parse_cpreg);
 }
 
+unsigned long
+avr32_parse_pico_reglist(char *str, char **endptr)
+{
+  return parse_reglist(str, endptr, avr32_parse_picoreg);
+}
+
 int
 avr32_make_regmask8(unsigned long regmask16, unsigned long *regmask8)
 {
Index: binutils/opcodes/avr32-asm.h
===================================================================
--- binutils/opcodes/avr32-asm.h	(revision 4943)
+++ binutils/opcodes/avr32-asm.h	(revision 4944)
@@ -28,10 +28,14 @@
 avr32_parse_cpreg(const char *str);
 extern int
 avr32_parse_fpreg(const char *str);
+extern int
+avr32_parse_picoreg(const char *str);
 extern unsigned long
 avr32_parse_reglist(char *str, char **endptr);
 extern unsigned long
 avr32_parse_cpreglist(char *str, char **endptr);
+extern unsigned long
+avr32_parse_pico_reglist(char *str, char **endptr);
 extern int
 avr32_make_regmask8(unsigned long regmask16, unsigned long *regmask8);
 
Index: binutils/opcodes/avr32-opc.c
===================================================================
--- binutils/opcodes/avr32-opc.c	(revision 4943)
+++ binutils/opcodes/avr32-opc.c	(revision 4944)
@@ -25,6 +25,8 @@
 
 #include "avr32-opc.h"
 
+#define PICO_CPNO	1
+
 void
 avr32_insert_simple(const struct avr32_ifield *field,
 		    void *buf, unsigned long value)
@@ -4244,6 +4246,306 @@
 	{ 0, 0x10 },
       },
     },
+    {
+      AVR32_ALIAS_PICOSVMAC0,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x0e },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSVMAC1,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x0d },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSVMAC2,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x0c },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSVMUL0,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x0a },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSVMUL1,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x09 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSVMUL2,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x08 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMAC0,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x06 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMAC1,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x05 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMAC2,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x04 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMUL0,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x02 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMUL1,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x01 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOVMUL2,
+      &avr32_opc_table[AVR32_OPC_COP],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+	{ 0, 0x00 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_D1,
+      &avr32_opc_table[AVR32_OPC_LDC_D1],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_D2,
+      &avr32_opc_table[AVR32_OPC_LDC_D2],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_D3,
+      &avr32_opc_table[AVR32_OPC_LDC_D3],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 }, { 1, 3 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_W1,
+      &avr32_opc_table[AVR32_OPC_LDC_W1],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_W2,
+      &avr32_opc_table[AVR32_OPC_LDC_W2],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLD_W3,
+      &avr32_opc_table[AVR32_OPC_LDC_W3],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 }, { 1, 3 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLDM_D,
+      &avr32_opc_table[AVR32_OPC_LDCM_D],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLDM_D_PU,
+      &avr32_opc_table[AVR32_OPC_LDCM_D_PU],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLDM_W,
+      &avr32_opc_table[AVR32_OPC_LDCM_W],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOLDM_W_PU,
+      &avr32_opc_table[AVR32_OPC_LDCM_W_PU],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOMV_D1,
+      &avr32_opc_table[AVR32_OPC_MVCR_D],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOMV_D2,
+      &avr32_opc_table[AVR32_OPC_MVRC_D],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOMV_W1,
+      &avr32_opc_table[AVR32_OPC_MVCR_W],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOMV_W2,
+      &avr32_opc_table[AVR32_OPC_MVRC_W],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_D1,
+      &avr32_opc_table[AVR32_OPC_STC_D1],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_D2,
+      &avr32_opc_table[AVR32_OPC_STC_D2],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_D3,
+      &avr32_opc_table[AVR32_OPC_STC_D3],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 }, { 1, 3 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_W1,
+      &avr32_opc_table[AVR32_OPC_STC_W1],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_W2,
+      &avr32_opc_table[AVR32_OPC_STC_W2],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOST_W3,
+      &avr32_opc_table[AVR32_OPC_STC_W3],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 }, { 1, 3 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSTM_D,
+      &avr32_opc_table[AVR32_OPC_STCM_D],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSTM_D_PU,
+      &avr32_opc_table[AVR32_OPC_STCM_D_PU],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSTM_W,
+      &avr32_opc_table[AVR32_OPC_STCM_W],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
+    {
+      AVR32_ALIAS_PICOSTM_W_PU,
+      &avr32_opc_table[AVR32_OPC_STCM_W_PU],
+      {
+	{ 0, PICO_CPNO },
+	{ 1, 0 }, { 1, 1 }, { 1, 2 },
+      },
+    },
   };
 
 
@@ -4996,6 +5298,390 @@
 	AVR32_OPERAND_JMPLABEL,
       },
     },
+    {
+      AVR32_SYNTAX_PICOSVMAC0,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMAC0] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSVMAC1], 4,
+      {
+	AVR32_OPERAND_PICO_OUT0,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSVMAC1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMAC1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSVMAC2], 4,
+      {
+	AVR32_OPERAND_PICO_OUT1,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSVMAC2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMAC2] },
+      NULL, 4,
+      {
+	AVR32_OPERAND_PICO_OUT2,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSVMUL0,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMUL0] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSVMUL1], 4,
+      {
+	AVR32_OPERAND_PICO_OUT0,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSVMUL1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMUL1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSVMUL2], 4,
+      {
+	AVR32_OPERAND_PICO_OUT1,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSVMUL2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSVMUL2] },
+      NULL, 4,
+      {
+	AVR32_OPERAND_PICO_OUT2,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMAC0,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMAC0] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOVMAC1], 4,
+      {
+	AVR32_OPERAND_PICO_OUT0,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMAC1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMAC1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOVMAC2], 4,
+      {
+	AVR32_OPERAND_PICO_OUT1,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMAC2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMAC], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMAC2] },
+      NULL, 4,
+      {
+	AVR32_OPERAND_PICO_OUT2,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMUL0,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMUL0] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOVMUL1], 4,
+      {
+	AVR32_OPERAND_PICO_OUT0,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMUL1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMUL1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOVMUL2], 4,
+      {
+	AVR32_OPERAND_PICO_OUT1,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOVMUL2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOVMUL], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOVMUL2] },
+      NULL, 4,
+      {
+	AVR32_OPERAND_PICO_OUT2,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_D2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_D2] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLD_D3], 2,
+      {
+	AVR32_OPERAND_PICO_REG_D,
+	AVR32_OPERAND_INTREG_PREDEC,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_D3,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_D3] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLD_D1], 2,
+      {
+	AVR32_OPERAND_PICO_REG_D,
+	AVR32_OPERAND_INTREG_INDEX,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_D1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_D1] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_PICO_REG_D,
+	AVR32_OPERAND_INTREG_UDISP_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_W2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_W2] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLD_W3], 2,
+      {
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_INTREG_PREDEC,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_W3,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_W3] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLD_W1], 2,
+      {
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_INTREG_INDEX,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLD_W1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLD_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLD_W1] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_INTREG_UDISP_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLDM_D,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLDM_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLDM_D] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLDM_D_PU], -2,
+      {
+	AVR32_OPERAND_INTREG,
+	AVR32_OPERAND_PICO_REGLIST_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLDM_D_PU,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLDM_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLDM_D_PU] },
+      NULL, -2,
+      {
+	AVR32_OPERAND_INTREG_POSTINC,
+	AVR32_OPERAND_PICO_REGLIST_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLDM_W,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLDM_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLDM_W] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOLDM_W_PU], -2,
+      {
+	AVR32_OPERAND_INTREG,
+	AVR32_OPERAND_PICO_REGLIST_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOLDM_W_PU,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOLDM_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOLDM_W_PU] },
+      NULL, -2,
+      {
+	AVR32_OPERAND_INTREG_POSTINC,
+	AVR32_OPERAND_PICO_REGLIST_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOMV_D1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOMV_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOMV_D1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOMV_D2], 2,
+      {
+	AVR32_OPERAND_DWREG,
+	AVR32_OPERAND_PICO_REG_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOMV_D2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOMV_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOMV_D2] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_PICO_REG_D,
+	AVR32_OPERAND_DWREG,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOMV_W1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOMV_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOMV_W1] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOMV_W2], 2,
+      {
+	AVR32_OPERAND_INTREG,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOMV_W2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOMV_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOMV_W2] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_PICO_REG_W,
+	AVR32_OPERAND_INTREG,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_D2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_D2] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOST_D3], 2,
+      {
+	AVR32_OPERAND_INTREG_POSTINC,
+	AVR32_OPERAND_PICO_REG_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_D3,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_D3] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOST_D1], 2,
+      {
+	AVR32_OPERAND_INTREG_INDEX,
+	AVR32_OPERAND_PICO_REG_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_D1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_D1] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_INTREG_UDISP_W,
+	AVR32_OPERAND_PICO_REG_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_W2,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_W2] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOST_W3], 2,
+      {
+	AVR32_OPERAND_INTREG_POSTINC,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_W3,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_W3] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOST_W1], 2,
+      {
+	AVR32_OPERAND_INTREG_INDEX,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOST_W1,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOST_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOST_W1] },
+      NULL, 2,
+      {
+	AVR32_OPERAND_INTREG_UDISP_W,
+	AVR32_OPERAND_PICO_REG_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSTM_D,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSTM_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSTM_D] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSTM_D_PU], -2,
+      {
+	AVR32_OPERAND_INTREG,
+	AVR32_OPERAND_PICO_REGLIST_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSTM_D_PU,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSTM_D], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSTM_D_PU] },
+      NULL, -2,
+      {
+	AVR32_OPERAND_INTREG_PREDEC,
+	AVR32_OPERAND_PICO_REGLIST_D,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSTM_W,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSTM_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSTM_W] },
+      &avr32_syntax_table[AVR32_SYNTAX_PICOSTM_W_PU], -2,
+      {
+	AVR32_OPERAND_INTREG,
+	AVR32_OPERAND_PICO_REGLIST_W,
+      },
+    },
+    {
+      AVR32_SYNTAX_PICOSTM_W_PU,
+      AVR32_PICO, &avr32_mnemonic_table[AVR32_MNEMONIC_PICOSTM_W], AVR32_PARSER_ALIAS,
+      { .alias = &avr32_alias_table[AVR32_ALIAS_PICOSTM_W_PU] },
+      NULL, -2,
+      {
+	AVR32_OPERAND_INTREG_PREDEC,
+	AVR32_OPERAND_PICO_REGLIST_W,
+      },
+    },
   };
 
 #define NORMAL_MNEMONIC(name, syntax, str)		\
@@ -5350,6 +6036,20 @@
     NORMAL_MNEMONIC(FCASTD_S, FCASTD_S, "fcastd.s"),
     NORMAL_MNEMONIC(LDA_W, LDA_W, "lda.w"),
     NORMAL_MNEMONIC(CALL, CALL, "call"),
+    NORMAL_MNEMONIC(PICOSVMAC, PICOSVMAC0, "picosvmac"),
+    NORMAL_MNEMONIC(PICOSVMUL, PICOSVMUL0, "picosvmul"),
+    NORMAL_MNEMONIC(PICOVMAC, PICOVMAC0, "picovmac"),
+    NORMAL_MNEMONIC(PICOVMUL, PICOVMUL0, "picovmul"),
+    NORMAL_MNEMONIC(PICOLD_D, PICOLD_D2, "picold.d"),
+    NORMAL_MNEMONIC(PICOLD_W, PICOLD_W2, "picold.w"),
+    NORMAL_MNEMONIC(PICOLDM_D, PICOLDM_D, "picoldm.d"),
+    NORMAL_MNEMONIC(PICOLDM_W, PICOLDM_W, "picoldm.w"),
+    NORMAL_MNEMONIC(PICOMV_D, PICOMV_D1, "picomv.d"),
+    NORMAL_MNEMONIC(PICOMV_W, PICOMV_W1, "picomv.w"),
+    NORMAL_MNEMONIC(PICOST_D, PICOST_D2, "picost.d"),
+    NORMAL_MNEMONIC(PICOST_W, PICOST_W2, "picost.w"),
+    NORMAL_MNEMONIC(PICOSTM_D, PICOSTM_D, "picostm.d"),
+    NORMAL_MNEMONIC(PICOSTM_W, PICOSTM_W, "picostm.w"),
   };
 #undef NORMAL_MNEMONIC
 #undef ALIAS_MNEMONIC
Index: binutils/opcodes/avr32-opc.h
===================================================================
--- binutils/opcodes/avr32-opc.h	(revision 4943)
+++ binutils/opcodes/avr32-opc.h	(revision 4944)
@@ -30,6 +30,7 @@
 #define AVR32_DSP		(1 << 3)
 #define AVR32_RMW		(1 << 4)
 #define AVR32_FP		(1 << 16)
+#define AVR32_PICO		(1 << 17)
 
 /* Registers we commonly refer to */
 #define AVR32_REG_R12		12
@@ -177,6 +178,13 @@
   AVR32_OPERAND_COH,
   AVR32_OPERAND_FPREG_S,
   AVR32_OPERAND_FPREG_D,
+  AVR32_OPERAND_PICO_REG_W,
+  AVR32_OPERAND_PICO_REG_D,
+  AVR32_OPERAND_PICO_REGLIST_W,
+  AVR32_OPERAND_PICO_REGLIST_D,
+  AVR32_OPERAND_PICO_OUT0,
+  AVR32_OPERAND_PICO_OUT1,
+  AVR32_OPERAND_PICO_OUT2,
   AVR32_OPERAND__END_
 };
 #define AVR32_OPERAND_UNKNOWN AVR32_OPERAND__END_
@@ -1137,6 +1145,42 @@
   AVR32_SYNTAX_FCASTD_S,
   AVR32_SYNTAX_LDA_W,
   AVR32_SYNTAX_CALL,
+  AVR32_SYNTAX_PICOSVMAC0,
+  AVR32_SYNTAX_PICOSVMAC1,
+  AVR32_SYNTAX_PICOSVMAC2,
+  AVR32_SYNTAX_PICOSVMUL0,
+  AVR32_SYNTAX_PICOSVMUL1,
+  AVR32_SYNTAX_PICOSVMUL2,
+  AVR32_SYNTAX_PICOVMAC0,
+  AVR32_SYNTAX_PICOVMAC1,
+  AVR32_SYNTAX_PICOVMAC2,
+  AVR32_SYNTAX_PICOVMUL0,
+  AVR32_SYNTAX_PICOVMUL1,
+  AVR32_SYNTAX_PICOVMUL2,
+  AVR32_SYNTAX_PICOLD_D2,
+  AVR32_SYNTAX_PICOLD_D3,
+  AVR32_SYNTAX_PICOLD_D1,
+  AVR32_SYNTAX_PICOLD_W2,
+  AVR32_SYNTAX_PICOLD_W3,
+  AVR32_SYNTAX_PICOLD_W1,
+  AVR32_SYNTAX_PICOLDM_D,
+  AVR32_SYNTAX_PICOLDM_D_PU,
+  AVR32_SYNTAX_PICOLDM_W,
+  AVR32_SYNTAX_PICOLDM_W_PU,
+  AVR32_SYNTAX_PICOMV_D1,
+  AVR32_SYNTAX_PICOMV_D2,
+  AVR32_SYNTAX_PICOMV_W1,
+  AVR32_SYNTAX_PICOMV_W2,
+  AVR32_SYNTAX_PICOST_D2,
+  AVR32_SYNTAX_PICOST_D3,
+  AVR32_SYNTAX_PICOST_D1,
+  AVR32_SYNTAX_PICOST_W2,
+  AVR32_SYNTAX_PICOST_W3,
+  AVR32_SYNTAX_PICOST_W1,
+  AVR32_SYNTAX_PICOSTM_D,
+  AVR32_SYNTAX_PICOSTM_D_PU,
+  AVR32_SYNTAX_PICOSTM_W,
+  AVR32_SYNTAX_PICOSTM_W_PU,
   AVR32_SYNTAX__END_
 };
 #define AVR32_NR_SYNTAX AVR32_SYNTAX__END_
@@ -1173,6 +1217,42 @@
     AVR32_ALIAS_FMOV3_D,
     AVR32_ALIAS_FCASTS_D,
     AVR32_ALIAS_FCASTD_S,
+    AVR32_ALIAS_PICOSVMAC0,
+    AVR32_ALIAS_PICOSVMAC1,
+    AVR32_ALIAS_PICOSVMAC2,
+    AVR32_ALIAS_PICOSVMUL0,
+    AVR32_ALIAS_PICOSVMUL1,
+    AVR32_ALIAS_PICOSVMUL2,
+    AVR32_ALIAS_PICOVMAC0,
+    AVR32_ALIAS_PICOVMAC1,
+    AVR32_ALIAS_PICOVMAC2,
+    AVR32_ALIAS_PICOVMUL0,
+    AVR32_ALIAS_PICOVMUL1,
+    AVR32_ALIAS_PICOVMUL2,
+    AVR32_ALIAS_PICOLD_D1,
+    AVR32_ALIAS_PICOLD_D2,
+    AVR32_ALIAS_PICOLD_D3,
+    AVR32_ALIAS_PICOLD_W1,
+    AVR32_ALIAS_PICOLD_W2,
+    AVR32_ALIAS_PICOLD_W3,
+    AVR32_ALIAS_PICOLDM_D,
+    AVR32_ALIAS_PICOLDM_D_PU,
+    AVR32_ALIAS_PICOLDM_W,
+    AVR32_ALIAS_PICOLDM_W_PU,
+    AVR32_ALIAS_PICOMV_D1,
+    AVR32_ALIAS_PICOMV_D2,
+    AVR32_ALIAS_PICOMV_W1,
+    AVR32_ALIAS_PICOMV_W2,
+    AVR32_ALIAS_PICOST_D1,
+    AVR32_ALIAS_PICOST_D2,
+    AVR32_ALIAS_PICOST_D3,
+    AVR32_ALIAS_PICOST_W1,
+    AVR32_ALIAS_PICOST_W2,
+    AVR32_ALIAS_PICOST_W3,
+    AVR32_ALIAS_PICOSTM_D,
+    AVR32_ALIAS_PICOSTM_D_PU,
+    AVR32_ALIAS_PICOSTM_W,
+    AVR32_ALIAS_PICOSTM_W_PU,
     AVR32_ALIAS__END_
   };
 #define AVR32_NR_ALIAS AVR32_ALIAS__END_
@@ -1536,6 +1616,20 @@
      AVR32_MNEMONIC_FST_D, */
   AVR32_MNEMONIC_LDA_W,
   AVR32_MNEMONIC_CALL,
+  AVR32_MNEMONIC_PICOSVMAC,
+  AVR32_MNEMONIC_PICOSVMUL,
+  AVR32_MNEMONIC_PICOVMAC,
+  AVR32_MNEMONIC_PICOVMUL,
+  AVR32_MNEMONIC_PICOLD_D,
+  AVR32_MNEMONIC_PICOLD_W,
+  AVR32_MNEMONIC_PICOLDM_D,
+  AVR32_MNEMONIC_PICOLDM_W,
+  AVR32_MNEMONIC_PICOMV_D,
+  AVR32_MNEMONIC_PICOMV_W,
+  AVR32_MNEMONIC_PICOST_D,
+  AVR32_MNEMONIC_PICOST_W,
+  AVR32_MNEMONIC_PICOSTM_D,
+  AVR32_MNEMONIC_PICOSTM_W,
   AVR32_MNEMONIC__END_
 };
 #define AVR32_NR_MNEMONICS AVR32_MNEMONIC__END_